Lab/Tutorial 1 - Introduction to Cadence Schematic Capture and Simulation

In this course, we will use the Cadence design tools to design schematics and layouts of various hardware designs. These tools are the state-of-the-art CAD tools widely used in industry. The Cadence tools provide many features and functionality, some of which you will not need in this course. This tutorial will provide a basic introduction on how to use the schematic capture and simulation tools along with various other helpful functions.

Cadence Setup and Initialization

  1. Run Xming at first through Start/Programs/Xming.
  2. Log onto bender.ee.ucr.edu using puTTY (or other ssh program).
  3. type bender.ee.ucr.edu in Host Name,Then click Open

    After you log on to the network with using your ENGR username and password ,you will see the following screen on the terminal.

  4. Execute the command icfb& to start Cadence. (NOTE: Before staring, make sure that in the correct directory by typing pwd, you should see: /home/eegrad/your user name; Othewise, typing cd to get to your home directory)

You should be presented with the Command Interpreter Window (CIW) and Library Manager windows as shown below:

Note: When you exit the Cadence design environment not all processes started by the application will be stopped. Unless you ensure that you kill all cadence processes when you exit, hercules will become slower and less responsive. When you are finished using Cadence or if Cadence crashes on you, please make sure to kill your processes. To kill all Cadence processes, run the following command:

ps -ef | grep $LOGNAME | grep cadence | awk '{print $2}' | xargs kill -9

In addition, at 2AM everyday, all Cadence processes will automatically be terminated. If you are working on your lab around that time frame, please make sure you save all of your work.



Library Creation

It is strongly recommended that you create a library for each tutorial or lab assignment using a descriptive library name. The create a library for the tutorial, use the following procedure as shown below:

  1. Using the Library Manager Window, select File => New => Library.
  2. Enter the library name mylib_rlc in the Name field.
  3. Select the option No tech library needed under Technology Library.
  4. Click OK.

Creating a New Design

During the curse of each lab assignments, you will have to create several designs, including schematics, layouts and test circuits. For each of these items, you can create the designs using the following procedure as shown below:

  1. Using the Library Manager Window, select File => New => Cell View.
  2. Select mylib_rlc from the Library Name drop-down menu.
  3. Enter the cell name rlc in the Cell Name field.
  4. Enter the view name schematic in the View Name field.
  5. Select Composer-Schematic from the Tool drop-down menu.

Schematic Capture

You should be presented with a empty Composer window as shown:

Cadence provides many different ways for adding components to your schematic and/or changes options. While designing a circuit, you can use the menus, toolbar (icons on the left side of the screen), or keystroke to accomplish the same task. If you use the toolbar, as you move the mouse over each toolbar icon, a popup description will indicate the functionality.

To demonstrate how to create a schematic design, we will be designing the circuit shown here.

Adding Component Instances

  1. Click on the Instance icon or select Add => Instance.
  2. You will be presented with two windows, the Component Browser and the Add Instance windows.
  3. From the Component Browser Window, under Library, select analogLib.
  4. Click on the Flatten checkbox, to provide the full list of components available in this library.
  5. Select the component res from the list. By selecting the resistor component, the corresponding information will be filled in the Add Instance window.


  6. The Add Instance window will also allow us to customize the component we are adding to our schematic. In this case, we would like to adjust the value of the resistor we are adding to 22 K Ohms. As shown below, we simply enter the desired value into the Resistance field.


  7. Within the schematic editing window, as you move the mouse you should see the outline of a resistor. Place two resistor within your schematic as shown in the completed schematic shown above.
  8. Using the same procedure, add a 47n F capacitor, cap, as shown in the completed schematic.
  9. Using the same procedure, add a 500m H inductor, ind, as shown in the completed schematic.
  10. Using the same procedure, add a ground, gnd, as shown in the completed schematic.
  11. When completed, to exit the Add Instance mode, close the Add Instance window and within the schematic editing window hit Escape. Similarly, when editing a schematic or layout, to deselect a given tool, you can simply hit the Escape key.
  12. In order to rotate a component instance, you can either select the component by clicking and press r or you select the component and select Edit => Rotate.

Adding IO Pins

We now need to add IO pins to your design using the following procedure.

  1. Click on the Pin icon or select Add => Pin. You will be presented with the Add Pin dialog as shown here.


  2. Under the Pin Names field, enter Vin Vout.
  3. We will initially select the Direction as Input.
  4. Click No button after Attach Net Expression.
  5. Within the schematic window, place the first pin, Vin as shown in the completed schematic.
  6. Add another pin Vout.We now need to change the pin Direction to Output and place the Vout as shown in the completed schematic.

Connection Wires

Now that all of our components and IO pins have been added we need to connect the components together with wire. To connect components within wire, use the following procedure.

  1. Click on the Wire icon or select Add => Wire (narrow). You will be presented with the Add Wire dialog as shown here.


  2. Within the schematic editing window, draw wires by selecting a starting point and dragging the mouse to the desired endpoint. You can create wires to connect components together, to connect two existing wires together, and connecting a component to existing wire.

Modifying Instance Properties

We often will need to change the properties of a component we have added to a design. While we could simply delete the component and add the correct component, we can also modify the properties directly.

  1. You currently should have two 22K Ohm resistors in your design. However, looking at the completed schematic, the vertical resistor on the right should be 75 Ohms instead.
  2. Select the resistor by clicking on it once.
  3. Click on the Properties icon, select Edit => Properties => Object, or press the q key. You will be presented with the Edit Object Properties window as shown here.


  4. Modify the Resistance to 75 Ohms and click on OK.

Saving your Designs

While you can simply save your design by click on the Save icon or selecting Design => Save, there is a better way to save you designs use the Check and Save.

  1. Select Design => Check and Save. This option will check you design for any errors or warnings that may be present.
  2. You will notified of errors by a visual indicator within your design as well as the error or warnings information within the CIW window. If you created your schematic properly, you should see the following message in the CIW window shown here.


  3. If you have errors, you will see small flashing squares within the schematic editing window.
  4. Read the error and warning messages within the CIW windows and the correct the errors/warnings as necessary.
  5. Once correct, check and save your design by selecting Design => Check and Save.

Quick Usage Reference

the following are some keyboard shortcuts for commonly used commands.

  1. Press p to add pins.
  2. Press q to after selecting a component to edit properties.
  3. Press w to add wires.
  4. Press f to fit the schematic to the schematic window.
  5. Press l to label a wire.
  6. Press Up or Down arrow to scroll your design.
  7. Press ESC to terminate any of the operation within the schematic window.

Printing a Design

For all of your labs, you will need to turnin printouts of the designs you created. In order to print your schematic, use the following procedure.

  1. Select Design => Plot => Submit. You will be presented with the Submit Plot window as shown here.


  2. Click on Plot Options... in the lower right hand corner of the window. You will be presented with the Plot Options window as shown here.


  3. Select the Plotter Type as EPS.
  4. Select the Paper Size as 8x10.5.
  5. Select the Send Plot Only to File option and enter the desired schematic name, i.e., rlc_schematic.
  6. Click on OK.
  7. Back in the Submit Plot window, click the OK button.
  8. The printed schematic, in EPS format, should now be located within your cadence directory.

Creating a Symbol View

You now need to create a Symbol view of your circuit. The symbol view is a black-box view that describes a circuit or component as a box with only inputs and outputs visible.

  1. To create the symbol view, we will create the Symbol cellview from or schematic cellview.
  2. Select Design => Create Cell View => From Cellview... to automatically create the symbol. You will be presented with Cellview From Cellview window shown here.


  3. Ensure From View Name is schematic and To View Name is symbol.
  4. Click on OK
  5. You should be presented with the Symbol Editing Window.
  6. The outside red box defines the selection region when selecting the symbol within a schematic design.
  7. The inside green box defines the dimension of the symbol as it would be shown within a schematic design.
  8. The @instanceName is a label that displays the instance or cell name, e.g. rlc1.
  9. The @partName is a label that displays the symbol name when placing at schematic, e.g. RLC
  10. Expand both the green and red boxes by selecting and drag the box edges.
  11. You should now modify the @partName label to describe the symbol. Click on the @partName label and press q, you will be presented with the window shown here.


  12. Enter RLC as the Label.
  13. Change the Font Height to 0.15.
  14. Click OK.


  15. Check and save the symbol view.

Creating a Test Circuit (Schematic)

Yo now need to create a schematic that will be used to test your circuit design.

  1. From the Library Manager Window, select File => New => Cell View.
  2. Select mylib_rlc from the Library Name drop-down menu.
  3. Enter the cell name test_rlc in the Cell Name field as shown here.


  4. First, you must add will add the RLC component you just create. Click on the Instance icon or select Add => Instance.
  5. Again, you will be presented with two windows, the Component Browser and the Add Instance windows.
  6. From the Component Browser Window, under Library, select mylib_rlc.
  7. Select the component rlc from the list and place the component within your test schematic.
  8. From the analogLib library, add a vsin component.
  9. Before adding the component to your design, set the AC Magnitude to 1 V.
  10. Set the Offset Voltage to 0 V.
  11. Set the Amplitude to 50m V.
  12. Set the Frequency to 1M Hz.
  13. Add a 1p F capacitor, cap, and Ground, gnd to the test schematic and connect the test schematic as shown here.


  14. Select Add => Wire Name.... You will be presneted with the following window.


  15. In the Name field enter Vin Vout.
  16. Switching back to the Schematic Editing window of your test circuit, add the wire names to the circuit by selecting the wires connected to the input Vin and output Vout of the RLC component.
  17. Your final test circuit schematic should look similar to the following.


  18. Check and save the test circuit schematic.

Initializing the Simulation Environment

Using the test schematic you just created, you now will simulate your circuit design using Cadence's Anolog Environemnt. For most of the labs, you will use a similar procedure to simulate the schematic and layout designs you will create. The following provides an overview of the procedure required to simulate a schematic design.

  1. From the schematic window of your test circuit, select Tools => Analog Environment.
  2. You will be presented with the Affirma Analog Environment window as shown here.


  3. The design area should indicate which schematic you are simulating, which is most cases should be the schematic view of your test circuit.

Simulation Engine

There are many different simulation engines. For this coruse will we be using the SpectreS simulation engine.

  1. In the analog environment window, select Setup => Simulator/Directory/Host.
  2. You should be presented with the window shown here.


  3. Select the Simualator as spectreS
  4. Ensure the Project Directory is ~/cadence/simulation.
  5. Click on the OK button.
  6. If you are prompted to "Save Current State," select Yes and enter the state name as state1.

Choosing Analyses

In addition to different simulation engines, there are also different types of analyses. The following is a brief breakdown of the different analyses available.

For this lab we will using three of the available analyses types to simulation the circuit.

  1. Click on the Choose Analysis icon, or select Analysis => Choose.
  2. In the window that appears, select the Analysis as tran/. You should now be presented with the following window.


  3. In the Stop Time field, enter 3u.
  4. In the lower left hand corner, ensure that Enabled is selected.
  5. Click on the Apply button. By selecting Apply instead of OK, you can continue to add more analyses without reopening the window. If you were to click OK, instead the Choosing Analyses window will be closed.
  6. We now need to add an AC analysis. To do so, first select the Analysis as ac. You should be presnted with the following window


  7. Set the Sweep Variable to Frequency.
  8. Set the Sweep Range to Start-Stop.
  9. Set the Start to 0.01k.
  10. Set the Stop to 10k.
  11. Set the Sweep Type to Logarithmic.
  12. Set the Points Per Decade to 20.
  13. In the lower left hand corner, ensure that Enabled is selected.
  14. Click on the Apply button.
  15. We now need to add an DC sweep analysis. To do so, first select the Analysis as dc. You should be presnted with the following window


  16. Set the Sweep Variable to Component Parameter.
  17. Click on the Select Component button. At this point you shoul dswitch to your test schematic window and click on the vsin component you added earlier.
  18. You will then be presented with the Select Component Parameter window shown here.


  19. Select the component parameter dc and click the OK button.
  20. Back in the Choosing Analyses window, set the Sweep Range to Start-Stop.
  21. Set the Start to 0.
  22. Set the Stop to 100.
  23. In the lower left hand corner, ensure that Enabled is selected.
  24. As we are finished adding analyses, you can click on the OK button.
  25. Your Affirma Analog Environment window should look similar to the following.


Plotting Simulation Data

Before you can simulate the design, we first need to select which signals, inputs, and outputs you want to simulate. While there are several methods that you can use to select the simulation outputs, the most convinient method is described here.

  1. Select Outputs => To Be Plotted => Select on Schematic.
  2. You should now swich back to your Schematic Editing window of your test circuits and select the wires you previously labeled Vin and Vout.
  3. Your Your Affirma Analog Environment window should look similar to the following.


Running the Simulation

We can now simulate our design and view the simulation output to ensure proper functionality.

  1. Click on the Run Simulation icon or select Simulation => Run.
  2. You will be presented with the Waveform Window as shown here.


  3. The waveform window consists of three separate plots for each of the three analyses you selected. you can switch between the different plots by clicking within the plot area. Select the DC Response plot. You should notice the 3 in the upper right corner of the plot is highlighted, indicating which plot is currently selected.
  4. Select Axis => Strips. This will split the waveform for the DC Response into two separate plots for Vin and Vout. Repeat this process for the other two analyses.
  5. Double-click on the y-axis label of the Transient Response. The following window will be shown.


  6. Click the box near Default, to cancel the tick.
  7. Fill in the Label field with Vout and click on OK. Repeat this process for the other plots.
  8. Use the Delta Cursor to measure the output peak-to-peak amplitude of the Transient Response signal. Select Trace => Delta Cursor . Drag the cursors to positive and negative peak of the output waveform.
  9. The information for each marker, along with the delta (difference) between the two will be displayed at the bottom of the plot.
  10. We can also delete waveforms from the waveform window. To delete the bottom Vin-Vin plot of the DC Response section, click on the bottom waveform, and press the Del key on your keyboard.
  11. At this point, your Waveform Window should look similar to the following.


Printing the Simulation Waveform

To print the simulation results, use the following procedure.

  1. Select Window => Hardcopy. You will be presented with the Hard Copy window as shown here.


  2. Select the Display Type as psb.
  3. Select the Plotter Type as EPS.
  4. Select the Paper Size as 8x10.5.
  5. Select the Send Plot Only to File option and enter the desired schematic name, i.e., rlc_simulation.
  6. Click on OK.
  7. The printed waveform, in EPS format, should now be located within your cadence directory.

Congratulations

Congratulations, you have now successfully created a schematic design and simulated that design to ensure proper functionality.

Demo

You must demo the following aspects or your NAND gate design to the TA.

  1. RLC schematic design.
  2. RLC test circuit schematic design.
  3. RLC simulation results.

Lab Report

In addition to the standard lab report format, you must submit the following information.

  1. Circuit schematic.
  2. Circuit symbol view.
  3. Test circuit schematic.
  4. Circuit simulation waveform.