Biographical Sketch of Prof. Sheldon X.-D.
Tan
Dr.
Sheldon Tan is a Full Professor in the Department of Electrical Engineering,
University of California at Riverside. He is the Associate Director of Compute Engineering
Program (CEN) at Bourn College of Engineering at UC Riverside since 2009. He
also is a cooperative faculty member in the Department of Computer Science and
Engineering at UCR. He received his B.S. and M.S. degrees in electrical
engineering from Fudan University, Shanghai, China in
1992 and 1995, respectively and the Ph.D. degree in electrical and computer
engineering from the University of Iowa, Iowa City, in 1999.
He
was a faculty member in Department of Electrical Engineering, Fudan University from 1995 to 1996. He worked for Monterey Design Systems Inc.
(now Synopysis), CA, from 1999 to 2001 and Altera
Corporation CA, from 2001 to 2002. Since
2002, he has
been with the Department of Electrical Engineering, University of California at
Riverside, CA. Prof. Tan is a Visiting Professor of Fudan
University and Tsinghua University, China and a Chaired Guest Professor of
Shanghai Jiaotong University and University of
Electronic Science and Technology of China, China.
Dr. Tan research interests
include several aspects of design automation for VLSI integrated circuits
– (1) Parallel and intelligent computing (deep learning) and analysis on
heterogeneous and accelerator-rich (GPUs) platforms; (2) Hardware security and
trust computing; (3) Smart devices and
embedded and cyber-physical systems; (4) VLSI reliability, modeling,
optimization and management at circuit and system levels; (5) Thermal modeling,
optimization and dynamic thermal management at circuit, chip and board levels;
(6) Statistical modeling and optimization for VLSI systems. He has published over 220 journal and
conference papers and gave over 80 invited presentations, tutorials and short courses at
conferences and workshops. He co-authored four books: Symbolic Analysis and Reduction of VLSI Circuits published by
Springer/Kluwer in 2005, Advanced Model
Order Reduction Techniques for VLSI Designs by Cambridge University Press
published in 2007; Statistical
Performance Analysis and Modeling Techniques for Nanometer VLSI Design by
Springer Publishing in 2012 and Advanced
Symbolic Analysis for VLSI Systems -- Methods and Applications, Springer in
2014.
He received
Outstanding Oversea Investigator Award (杰青-B) CAREER
Award in 2004. Dr. Tan received the Best Paper Award from 2007 IEEE International
Conference on Computer Design (from the National Natural Science Foundation of
China (NSFC) in 2008. Dr. Tan received NSF CAREER Award in 2004. Dr. Tan received the Best Paper Award from
2007 IEEE International Conference on Computer Design (ICCD’07), the Best Paper
Award from 1999 IEEE/ACM Design Automation Conference and the Best Poster Award from 1999 Spring Meeting of the NSF Center
for Design of Analog and Digital Integrated Circuits (CDADIC). He also receives three Best Paper Award Nomination
from IEEE/ACM Design Automation Conferences in 2005, 2009 and 2014 and one Best
Paper Award nomination from ASPDAC in 2015. He
received the UC Regent’s Faculty Fellowship in 2004 and 2006 and Academic
Senate COR (committee on Research) Fellowship from UCR in 2008 and 2013. One of
his papers was one of Top 10 of Downloaded Articles in ACM Transaction on Design Automation
of Electronic Systems (TODAES) in 2010. He also received the Best Graduate
Award and a number of Excellent College Student Scholarships from Fudan University.
Dr.
Tan now is serving as an Associate Editor for three journals: IEEE Transaction on VLSI Systems (TVLSI), ACM Transaction on Design Automation of
Electronic Systems (TODAE), Integration, The VLSI Journal. He is a technical program committee member of DAC,
ICCAD, ISLPED, ASPDAC, ICCD, ISQED. Dr. Tan is a senior member of IEEE. He holds
one patent, two provisional patents in United States and 5 patents in China.
IEEE style Biographical Sketch of Prof. Sheldon X.-D. Tan
{Sheldon
X.-D. Tan} (S’96-M’99-SM’06) received his B.S. and
M.S. degrees in electrical engineering from Fudan
University, Shanghai, China in 1992 and 1995, respectively and the Ph.D. degree
in electrical and computer engineering from the University of Iowa, Iowa City,
in 1999. He is a Professor in the Department of
Electrical Engineering, University of California, Riverside,
CA. He is the Associate Director of
Compute Engineering Program (CEN) at Bourn College of Engineering at UC
Riverside since 2009. He also is a cooperative faculty member in the Department of
Computer Science and Engineering at UCR.
His research interests include:
(1) Parallel and intelligent computing (deep learning) and analysis on
heterogeneous and accelerator-rich (GPUs) platforms; (2) Hardware security and
trust computing; (3) Smart devices and
embedded and cyber-physical systems; (4) VLSI reliability, modeling,
optimization and management at circuit and system levels; (5) Thermal modeling,
optimization and dynamic thermal management at circuit, chip and board levels;
(6) Statistical modeling and optimization for VLSI systems. He co-authored four
books: Symbolic Analysis and Reduction of
VLSI Circuits published by Springer/Kluwer in 2005, Advanced Model Order Reduction Techniques for VLSI Designs by
Cambridge University Press published in 2007; Statistical Performance Analysis and Modeling Techniques for Nanometer
VLSI Design by Springer Publishing in 2012 and Advanced Symbolic Analysis for VLSI Systems -- Methods and Applications,
Springer in 2014.
Dr. Tan received
Outstanding Oversea Investigator Award from the National Natural Science
Foundation of China (NSFC) in 2008. He received NSF CAREER Award in 2004. He received
NSF CAREER Award in 2004. Dr. Tan received the Best Paper Award from 2007 IEEE
International Conference on Computer Design (ICCD'07), the Best Paper Award
from 1999 IEEE/ACM Design Automation Conference. He also receives three Best Paper Award
Nomination from IEEE/ACM Design Automation Conferences in 2005, 2009 and 2014
and one Best Paper Award nomination from ASPDAC in 2015.
Dr. Tan now is serving as an
Associate Editor for three journals: IEEE
Transaction on VLSI Systems (TVLSI), ACM Transaction
on Design Automation of Electronic Systems (TODAE), Integration,
The VLSI Journal. He is a technical program committee member of DAC, ICCAD,
ISLPED, ASPDAC, ICCD, ISQED. Dr. Tan is a senior member of IEEE.